Power consumption differences between simulation and measurement result

[hyleeinhit]

Hello,

Any one know about power consumption differences between simulation and measurement about analog/digital/mixed-signal integrated circuits?

Using cadence spectre, I　believe that simulation result is the most close to measurement result for low frequency analog circuit, compared to digital/mixed-signal circuits. Am I right?

 

[dick_freebird]

That all depends on the model fidelity, and the completeness
of your expression of layout parasitics and such. There is a
good chance that models fail to accurately model leakage
(especially if you are expecting digital "corner" models to do
an analog job).

And your real part on a real eval board or test jig, is subject
to externalities you may or may not have put into your
simulation testbench, or simply estimated before building the
hardware.

Until you get real and take at least one pass around the
fidelity-closure loop, predictions and assertions are futile.