PolyFuse Non Volatile Memory

[nico_ic]

Hi! I am working on a non volatile one time programming memory using poly fuses. I am working with a process that doesn't have a standard cell for the fuse. Could it be very difficult a develope a cell? Do you need a lot of tries until you have a nice fuse cell thath blows if you start from scratch?

Thanks everyone!!

 

[dick_freebird]

Making a fuse work is easy. Making all of the "gatekeepers"
in your organization sign off on its reliability, can be difficult
or impossible, depending on how dysfunctional your reliability,
technology development and line management cadres are.

Funny story. I built fuses on a test chip and they worked
fine. We built qual samples, made a plan, the plan was
signed off, the fuses had good blow attributes and were
reliable as far as we could tell. We characterized the hell
out of them.

Then the same guy who had signed off on the plan, got
the PO for assembly and lifetest of the qual sample and
decided he wanted to not pay for it. So a couple of
years down the drain, and the part they were being
developed for had to use bond options instead of
fuses and suffers in production to this day. We had the
bad sense to put in a Plan B, expecting some management
butt-burglary or other. We should have made it a total
success scenario kind of plan so that screwing the
development would have meant pain for management
instead of letting them be a cost-savings hero while
ruining product development plans.

There's some basic rules of thumb and you should try
all of your poly options (silicided, non-silicided+doped)
to see what works best for the voltage and current
that your programming scheme can deliver (on-chip
programming switches can be huge, and possibly not
able to block the voltage yet pass the current needed,
or only be able to burn certain of the fuse material
options properly). Because "poly" usually has options
and different resistivity can result.

If you have a poly2 I'd use that, the thermal path is
a really significant element of the blow process and
the closer you are to a heat sink the tougher and less
consistent the blow will be.

 

[nico_ic]

Thank you very much for your answer!!! and sorry about the delay!

There is another question: How can I know which circuit for blowing the fuse should I use? I am working on a cmos technology 0.5um. Taking into account that this is a cmos process I don't trust very much in their bipolar...

Where can I found documentation, papers, books that talk about that?

Thanks!!

 

[dick_freebird]

The quality of the vertical bipolar device is a significant question. It can
be the most useful programming switch because, for one, it has a "free"
power supply distribution (die backside) and for another, you can get a
useful current gain and more current per area. But in my experience the
natural substrate BJT is designed specifically to be inferior, low gain etc.
and might want optimized for a PROM application. Then you have to
worry that this optimization brings in increased latchup sensitivity and
so on.

It's very difficult to find scholarly papers on poly-fuse memory design.
That's way retro, '70s-'80s style. More people today use antifuse,
either a special via or a gate-zap (standard FET, abused). I did quite
a bit of searching and turned up very little although IBM 7 does have
poly fuses and they put out a nice and detailed (as typical for IBM)
set of reports.

I think that at 0.5um you have a decent chance of standing off the
blow-voltage for a poly fuse, but will need a very wide device to pass
the current needed to do the job. Your bit cell area will be driven by
programming switch size (here is where getting the current vertically
through the substrate BJT device is sweet - if it's capable). The fuse
is trivial in comparison.

The other aspect of tradeoff is the sense amp circuitry. This can be
as simple as a resistor pullup and an inverter, but if you intend high
volume production then you care about blow-quality tails in the
distribution of post-blow resistance, which will affect read margin
and limit the yieldable array size. If you let people push you into
elaborate sense amps that can tolerate poor quality-of-blow, your
area and read power will jump up big time.

An antifuse device can be blown with a small W switch because
it needs minimal current to damage gate ox - the trick lies, in that
case, in making the damaging voltage safely switched by a device
of the same fundamental construction. That may come down to
some sequencing of address, power events, may want device
stacking, may want use of thick-oxide devices (which may have
their own issues if they are not strictly supported / qual'd, etc.).
I haven't had the opportunity to go down that road, but you may
want to look at the stuff that Kilopass / Novocell has published
and perhaps drill into the IEEE IRPS publications looking for any
antifuse reliability papers, which often throw in a little info on the
design for context.