PLZ HELP ... Very urgent

[tetooo]

Plz help. Vhdl code

I want a structural VHDL code of 1 to 16 Demultiplexers. with an active low Enable signal using 1 to 2 Demultiplexer. [ use Generate statement]

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Also I need a structure and behavior VHDL code of 5-bits binary counter with a synchronous load signal to preset the counter to a specific initial state. the output of the counter ( Q0 to Q4) are connected to a binary decoder that shows the state of the counter.

Select the proper category for your question, don't post VHDL questions to "Electronic Elementary" section.
Also use a proper title that describes the content of your message not "PLZ HELP ... Very urgent ".
Message moved, consider this a warning[alexan_e]