PLL design for 70MHZ input frequency and a loop bandwidth of 1KHZ

[Gayathri Jeyaram]

I am currently doing a project that involves a PLL design using simulink.
The specs are as mentioned. Input frequency: 70MHZ, Loop Bandwidth: 1KHZ.
Could anyone tell me how I can find the values for pd, vco, Loop filter gains (kd, kf and kv) and R1 C1 C2 parameters of the 2nd order lead lag loop filter ? A list of formula would be nice. I have been reading a lot of pdfs. I find them hard to comprehend, each pdf is more complex than the other or maybe I am just using my patience.
My simulink model includes the following:
Input sine wave used is a reference sine block.
PD used is a multiplier.
Loop filter used is a lead-lag filter of order 2.
VCO used is a continuous time VCO.
Scope to view the waves from VCO and Input.
Then how to analyse the output using a Scope ? How to validate my output in terms of loop bandwidth ?

 

[Element_115]

I am currently doing a project that involves a PLL design using simulink.
The specs are as mentioned. Input frequency: 70MHZ, Loop Bandwidth: 1KHZ.
Could anyone tell me how I can find the values for pd, vco, Loop filter gains (kd, kf and kv) and R1 C1 C2 parameters of the 2nd order lead lag loop filter ? A list of formula would be nice. I have been reading a lot of pdfs. I find them hard to comprehend, each pdf is more complex than the other or maybe I am just using my patience.
My simulink model includes the following:
Input sine wave used is a reference sine block.
PD used is a multiplier.
Loop filter used is a lead-lag filter of order 2.
VCO used is a continuous time VCO.
Scope to view the waves from VCO and Input.
Then how to analyse the output using a Scope ? How to validate my output in terms of loop bandwidth ?

Search online for components that meet your needs and read their Data sheets, for your needed parameters.
i.e. VCO's, Crystals Reference, PLL's (Charge pump are integrated in to PLL's).
Go search for online programs (From National Semi, or Analog Devices) for designing a loop filter for their
PLL's. This will get you familiar with many of the design requirements.

Cheers

 

[Zottel]

Later you can check the solution with a PLL-Simulation Programm. I thing the simplest to use ist the ADIsimPll for Analog Devices.

In my Optionion the best Datasheet for calculat PLL has Hittite, like https://www.hittite.com/content/documents/data_sheet/hmc704lp4.pdf

 

[biff44]

well, you can find some closed form equations for a simple 2nd order loop, but if you have simulink, you should be able to home in on a correct set of values in a few minutes. Run an open loop simulation, and try to recreate the following gain and phase transfer functions by selecting the right values. At some frequency F1 the open loop gain will be 0 dB. At that same frequency check the phase, and make sure it is at least 45 degree shy of hitting -180 degrees. If not, adjust your zero frequency (usually done by adjusting a resistor that is in series with a capacitor). When you have at least 45 degrees of phase margin, then you are done.

if you are looking for a specific loop bandwidth, you screw around with the values until the 0 dB crossing point is at the right frequency, and again mess around with the zero frequency until you have some phase margin.