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Please help me with proper dsp board design!

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electrodarkness

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Hello everyone!
I'm in my final year at the university, and I'm trying to create a digital guitar effects pedal with dsp chip. Until now I was working only with PIC-s, dsPIC-s. The idea would be the following: Designing analog amplifier/impedance matcher for input and output. Using CODEC for AD/DA conversion - I have two chips PCM3060 and AD1938, both with I2S interface, SDRAM for looper. The dsp at hand is a TMS320VC5507 chip. The last part is designing a user interface with PIC micro controller.
The question is can I use the mentioned dsp with the codec? - I didn't see I2S peripheral mentioned in the dsp datasheet, or could I implement a soft I2S with multi-channel buffered serial port?

Any advice is appreciated!
Thanks in advance!
 

After reading and rereading the datasheets and app notes, I'm still a little confused. on the TMS320VC5507 datasheet it says the McBSP port supports IIS protocol, but if I wire it up as Dout -> DR0, Din <- DX0, LRCLK1 -> FCLKR0, LRCLK2 <- FCLKX0, BCLK1 -> CLKR0, BCLK2 <- CLKX0, with PCM3060(ADC slave, DAC master) <-> *C5507, I don't know where to connect the clock input of the codec, and the frame input/output of the dsp differs from the L/R signal of the codec. Would it still be possible to use the upper mentioned setup, or would it be wise to implement a soft I2C with GPIO?
 

Hi,

what about a schematic or drawing... it could help to understand the problem.


Klaus
 

Also, the datasheet shows a dsp <-> sdram connection with BGA cased dsp, leaving A0 out, and using A14 address pin. On my LQFP chip there is no A14, only A[0..13], that means I need to use a sdram driver?
Any help about the I2S bus or the Parallel bus would be appreciated!

Ps: I updated my schematics.
 

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