Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Pin and Netlist Problem , IC Station, Calibre PEX

Status
Not open for further replies.

seen25

Newbie level 5
Joined
Mar 30, 2007
Messages
10
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,359
pin pex

I make an LVS check and it turns OK however when I try to extract (PEX) it did not exract ports in the subckt in the netlist.pex file.
in PEX window it gives this error
"WARNING: unable to find a map for port A on the template for cell ZERODETECT"
A will NOT be ported from the cell.
"WARNING: unable to find a map for port B on the template for cell ZERODETECT"
B will NOT be ported from the cell.


thus i cannot simulate it, i made ports via "Make Port" command and named them as in schematics, ,
they were bidirectional, can this be the problem?
or what else can be wrong?
 

pin pex br

Hello seen25,

I also met this kind of questions before. Maybe the bidirectional port can't be recognized. You can have a try to change them with one directional port.

May be helpful.

Thanks.
 

calibre pex pin error

thanks windy but it did not work out,

because i guess the net connected to port "myporta" should have net name "/myporta"

another point, i have two ports , say port1, port2
they are not connected to each other neither in schematic nor in layout, but in layout i see nets connected to them have same net names(say net 101), this is strange, when i removed all the net 101 from one path, and make it a new net, (say net 102) this time short checker finds shorts(in active contacts saying NETS 101&102 , even though i changed their net names) though there is no physical connection between them ,
then i deleted these contact giving short error, short checked again, no problem.

and draw them again (without copying from other contacts to forestall same problem)
give again some short problems.
and lvs still gives O.K.

Added after 47 minutes:

OK I prepared a new layout and schematic with including VDD and GND ports , it worked this time
it s strange somehow if the problem was power pins, if i remember correct , for example in large designs with cadence i prepare individual blocks without power pins , create cell view from layouts then floorplan and route them, now it seems ic station does not such an instance feature for layout cells, please correct me if i m wrong
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top