PIC Interrupts
Thanks for the ideas guys,
My application will use two interrupt sources, one from the External - a rising edge at RB0 and TMR0 overflow. The TMR0 is not pre scaled so it will increment on every instruction cycle and the PIC877A I used is running at 20 MHz. So therefore it is very likely that any interrupt was caused by the TMR0 overflow and the external interrupt has little chance to be triggred.
I purposely Cleared GIE at teh beginning of the Interrupt wether caused by TMR0 overflow or External Interrupt to simflipy program flow and coding.
I figured out the solution last night. And that is when an interrupt occurs either from TMR0 overflow or External Trigger on RB0, I must poll first INTCON, INTF to see is INFT is HIGH. It if it is not then service the TMR0 overflow.
Then I noticed that when an external trigger happened during TMR0 Overflow servicing, INTCON, INTF flag will be HIGH. Thus when after servicing TMR0 overflow, even if the MPU does not service RB0 interrupt, at the next TMR0 overflow, the Interrupt service routine will be forced to execute RB0 interrupt service because INTCON, INTF is HIGH thus bypassing TMR0 Interrupt service!
Again, thank you for the ideas
Jack