jenardo
Newbie level 6
Hi all,
In case of implementing a USB 2.0 core, I wanted to ask about its PHY interface.
1) Is it possible to output D+ and D- directly from the FPGA ?
2) or is some kind of transceiver in between needed to convert high and low voltages to a differential one ?
3) What is an UTMI interface ? and where exactly is it located in a design ?
Thanks
In case of implementing a USB 2.0 core, I wanted to ask about its PHY interface.
1) Is it possible to output D+ and D- directly from the FPGA ?
2) or is some kind of transceiver in between needed to convert high and low voltages to a differential one ?
3) What is an UTMI interface ? and where exactly is it located in a design ?
Thanks