Hi,
I am designing a phase locked loop with 100MHz reference frequency in cadence spectre. The VCO frequency is 2GHz. I need to obtain the phase noise or jitter of the whole pll. I will appreciate that, If anybody can help me
Actually phase noise is a characteristic of VCO .. and other than VCO all other circuits are DIGITAL only.. so i think it is ok to calculate for VCO only...
It's essentially a system simulation problem because simulating it on transistor based is pretty difficult.
If you know PN behaviour of each PLL block, you can simulate them in a system simulator even in MatLab.
It's essentially a system simulation problem because simulating it on transistor based is pretty difficult.
If you know PN behaviour of each PLL block, you can simulate them in a system simulator even in MatLab.
Hi,
1) by PN behaviour do you mean periodic noise behavior ?
2) Can you please refer me to link which details on how to do it with Matlab. Baisc transfer function simulations are possible with matlab but how do you include cyclo-stationarity of noise?
Thanks !