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PDK Problem - use of scalable design rules of MOSIS

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pdk problem

Hi dear all friends,
i want to draw layout of my ADC. maybe i'll be able to fabricate it. I used of TSMC 0.18u but now i'm not sure that which company will fabricate my chip. my professor offered me to use of scalable design rules of MOSIS, but unfortunately i couldn't find it. i would be appreciated if anybody give me a link for it. besides i'm not so sure about reliance of using scalbe design rules, will post layout simulation be accuurate?

Thx in advance
 

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