ali_umair21
Junior Member level 1
Hi everybody,
I want to use the Altera's PCIE core in a project. I have red the basics of transaction protocol. I want to know about the indication that tells the link training is completed by the physical layer and now i can send mem read/write requests TLPs. I mean, is there any register in the configuration space that indicates the status of link training?
I want to use the Altera's PCIE core in a project. I have red the basics of transaction protocol. I want to know about the indication that tells the link training is completed by the physical layer and now i can send mem read/write requests TLPs. I mean, is there any register in the configuration space that indicates the status of link training?