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PCIe: endpoint configuration

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ali_umair21

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Hi everybody,

I want to use the Altera's PCIE core in a project. I have red the basics of transaction protocol. I want to know about the indication that tells the link training is completed by the physical layer and now i can send mem read/write requests TLPs. I mean, is there any register in the configuration space that indicates the status of link training?
 

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