Realistically, ASIC design is about Protocols. Been my experience that 75% of the ASIC effort revolves around a language like PERL, Systemverilog, VHDL, verilog, UNIX, and understanding the underlying protocol. ASIC design is NOT about sitting around designing "cool" circuits. We call that Analog design. I may be wrong, but these questions are just as valid as those involving a Place and Route tool that 95% of the ASIC designers will never see.
PCI-SIG may have given lectures on the basic differences between PCI and PCIe. The changes are significant. If you are trying to get ANY functional coverage of the PCIe controller from your testbench, then I recommend scraping the PCI aspects of the existing testbench and starting from scratch. There's no way to "convert" the testbench. Good Luck - there's a lot to PCIe. If this is not an industry project, you may want to look at implementing a subset of the protocol.