Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

pci express verification

Status
Not open for further replies.

balasub

Member level 1
Joined
May 15, 2007
Messages
36
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,503
pcie bfm

Hi,
Can anyone help on the transition from pci to pci express in the area of verification.?Just the various differences and points to consider in developing the Test Bench.
 

starting pcie verification

Hi balasub,

I don't think any one here can help you regarding this. It is purely PCI & PCIE protocol related, and can't be listed here. You need to study the protocol and find the enhancements/differences. If the question is mre directed, I can give it a try.

Let me please know if if I haven't answered your question.

-mkrishnap
 

hi,
i am going to move from PCI to PCIe in one of our projects.This is basically a communication controller.So we are going to PCIe host interface.
So i need to make modifications to the existing TB.So any help or points to be noted in this area would be helpful...
 

If you are well versed with PCIe, then you yourself will know the differences.
The basic thing is -
PCI is parallel bus protocol where as PCIe is serial. So the test-bench will have to be modified for many feature changes.
And there are lot many....
 

i don't have any knowledge ab't it....read thro' the document some...but the spec has loads of info...hence asking for help...

if u could give pointers will be of great help..

i have an unverified pcie bfm already in hand!
 

Realistically, ASIC design is about Protocols. Been my experience that 75% of the ASIC effort revolves around a language like PERL, Systemverilog, VHDL, verilog, UNIX, and understanding the underlying protocol. ASIC design is NOT about sitting around designing "cool" circuits. We call that Analog design. I may be wrong, but these questions are just as valid as those involving a Place and Route tool that 95% of the ASIC designers will never see.

PCI-SIG may have given lectures on the basic differences between PCI and PCIe. The changes are significant. If you are trying to get ANY functional coverage of the PCIe controller from your testbench, then I recommend scraping the PCI aspects of the existing testbench and starting from scratch. There's no way to "convert" the testbench. Good Luck - there's a lot to PCIe. If this is not an industry project, you may want to look at implementing a subset of the protocol.
 

can anyone point me to some doc which briefly explains the differences between pci and pcie....atleast :)

I found a good pcie tutorial in the intel download section....

but still looking for some data with regards to verification if someone has prior experience
 

please respond guys!

looking for this urgently...
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top