You got a lot of answers to questions you actually didn't ask for. :smile: (although some of these questions may be relevant for your application as well)
Conductor height is simply the total copper thickness, and that's in fact the sum of the base copper and galvanic plating. The latter applies only for outer layers (or inner layers of a burried via process).
I understand, that you are designing a standard two layer PCB. In this case dielectric height, Er, copper height, possibly coating Er and thickness are the only relevant substrate parameters for trace impedance calculation. You'll notice, that the impact of copper height is limited for reasonable spacing numbers.
I further think, that the term "impedance control" doesn't apply here. It's just a PCB design for nominal trace impedance, without a tolerance specification or tests performed in PCB production.