PCB Differential Pairs Impedance

[kotshe]

Hi All ,

I'm trying to set Differential Pairs Impedance at 90 Ohm's For standard PCB FR4 of two layers , i'm trying to use Saturn PCB design , what I can't understand what is conductor Height .

I have

Base copper Weight = 18um
Plating thickness = 18um
Er = 4.6

But I cant understand what conductor Height is ?

Any help please

 

[FvM]

Should be 36 um in this case, isn't it?

 

[robertferanec]

To calculate geometry for 90OHMs Differential pairs routed on 2 layer PCB (Differential impedance of Microstrips) you need to know: width of the traces, space (gap) between the traces, height of dielectric above return plane, trace thickness and relative permittivity of the dielectric. There are plenty Impedance calculators available, but I would recommend you to ask your PCB manufacturer. Your calculated track geometry may differenciate from the numbers provided by your PCB manufacuter.

 

[kotshe]

FvM : I don't know if thats the sum of Weight and thickness , thats what i'm asking for ?

robertferanec :I'm asking with small PCB manufacturer , they are not helpful : they don't know what i'm asking for

 

[androm]

I can be missing here something but is that possible to achieve a proper differential pair routing without a permanent return current plane? Don't you guys think the board should be at least 4-layer for microstrip case?

 

[robertferanec]

I agree androm, but maybe it is just a small breakout board with usb on the top and gnd on the bottom.

 

[kotshe]

Robertferanec : could you please explain "height of dielectric above return plane" ? you don't mean width of PCB which is almost 1.6mm for standard PCB ? right ?

 

[robertferanec]

kotshe: you are right - 1.6mm. I don't use 2 layer PCB for impedance controlled tracks (minimum 4 layers as mentioned by androm). I was actually curious what the track geometry would be like for 1.6mm pcb and I did try to put some numbers here: PCB Calculator The results: width 2.5mm / gap 1.6mm (Zo = 55OHMs, Zdiff = 90OHMs)

 

[FvM]

You got a lot of answers to questions you actually didn't ask for. :smile: (although some of these questions may be relevant for your application as well)

Conductor height is simply the total copper thickness, and that's in fact the sum of the base copper and galvanic plating. The latter applies only for outer layers (or inner layers of a burried via process).

I understand, that you are designing a standard two layer PCB. In this case dielectric height, Er, copper height, possibly coating Er and thickness are the only relevant substrate parameters for trace impedance calculation. You'll notice, that the impact of copper height is limited for reasonable spacing numbers.

I further think, that the term "impedance control" doesn't apply here. It's just a PCB design for nominal trace impedance, without a tolerance specification or tests performed in PCB production.

 

[kotshe]

Well following to what had been said before I can't acheive design impedance of 90 Ohms for two layers PCB( Trace width and gap are big)

I will explain my problem clearly and I would be happy to get suggestion from you :

I need to connect Two IC through cast5e (cable, impedance of 90 Ohm) I'm using RJ45 connector ? how can I keep Continuity of 90Ohm ?(for two layers PCB)

Do you think mid layers could solve the problem

 

[robertferanec]

kotshe: I believe cat5e is 100 ohms. what ICs you would like to connect?

 

[kotshe]

UIC4102CP (USB extender) ,

 

[FvM]

Of course 90 ohm can be achieved in two layer PCB. You didn't yet tell, if you have a copper pour or void at the opposite layer. The USB common mode impedance specification would require a ground pour.

For 0.15 mm spacing, you get about 0.6 mm trace width. To further reduce the trace width, you can go for a "differential coplanar waveguide with ground" topology.





Apart from the basic feasibilty to implement USB impedances in a two layer PCB, there may be many reasons to use a multilayer, of course.

 

[ea.arun]

Kotsche:mid layers will definitely solve your problem(considering your copper thickness+tin plating thickness,Er etc).......
but you can try reducing the dielectric thicknes and increase the copper thickness to achieve the mentioned 90 ohm differential impedance(like 47mils from 62mils(1.6mm)) and achieve the same in 2 layers.....i have done the same but for a different impedance value....
unless it affetcs any mechanical or other parameters....

 

[kotshe]

I can use ground pour at top and bottom layers. Could you explain more how can I achieve 90 Ohm ? if 1.6mm height of dielectric above return plane 2.5mm width and spacing 1.6 mm it's too big to use ....

 

[robertferanec]

I don't know if this will help you, but:
- If it's more complicated device (not only UIC4102) then I would use 4 layer PCB.
- If it's only UIC4102 then I would find something like this **broken link removed** and bought it.

 

[ea.arun]

just go through this app note from SMSC and check how they have achieved 90Ohm in 2-layer pcb......

**broken link removed**

 

[FvM]

The SMSC AN uses 1.2 mm substrate. But you get reasonable dimensions with 1.6 mm standard substrate as well, see above.

 

[kotshe]

FvM : Thank you all , but I Guess I would go for FvM soluation seems to be the easy one to add Ground Polygon Pour (it's not considered as another layer and it would solve the problem).

---------- Post added at 14:43 ---------- Previous post was at 13:54 ----------

Final Request FvM could you please refer me to the calculator that you used .

Thanks A lot

 

[FvM]

I used Si6000 from polainstruments.com according to habbit. There's a number of free tools available as well.