Hi,
Since a dual port ram has limited size, one needs a circular addressing. On both sides.
With synchronous clocks the max datarate is when the data is stored at every second clock cycle of the 200MHz clock.
In my eyes the dual port RAM solution only works when
* there is a continous datastream
* with a fixed, known datarate.(integer division of 100MHz)
Else you need extra sync signals to transmit from one domain to the other.
But for sure it is possible.
***
With the FIFO, there are some benefits:
* works with unsynchronous clock also
* syncing is automatically made with the FIFO typical status signals
* both writing and reading can work with "gaps" in the datastream. ( bulk write or bulk read)
* status signals prevent underflow
* status signals show loss of data
Klaus