preethi19
Full Member level 5
Hi i have done pure analog layout and did the parasitic extraction too. I can understand parasitic extraction is done to obtain the parasitics that occur as a result of the layout design which we need to minimise. I am learning about digital design layout using encounter. i understand the same routing wires, spacing of blocks can create parasitics. But in a digital design there are many number of gates. How is it possible to check and correct for so many net connections??? I'm learning the process so can anyone pls help!!! Thanks