Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

parasitic capacitance between two signal nodes

Status
Not open for further replies.
A

amitabh262002

Member level 2
Joined
Jul 24, 2007
Messages
49
Helped
8
Reputation
16
Reaction score
6
Trophy points
1,288
Activity points
1,661
How can the parasitic capacitance between two signal nodes possibly cause
the signal transition on one of the nodes to be unexpectedly sped up?
 

when there is a capacitance then charge on plate tries to duplicate in the other plate with opposite charges.... so this could have an aiding effect during transition based on charge on the other node....
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top