i have a doubt in parallel processing concept using fpga. I want to implement this equation (a*b)+c where a,b,c is a vector of 100 different binary numbers. At the same time I am using a parallel architecture with 'n' no of multipliers and 'n' no of adders. What would be the results in terms of area, power and frequency for both normal and parallel implementation ? Can anyone please explain me?
What do you consider to be normal? A software implementation diguised as FPGA code?
A sequential implementation would calculate each of the 100 results one at a time. A fully parallel implementation would calculate all 100 results simultaneously. The parallel implementation would take approximately 100 times the area of the sequential version.