Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Output Impedance Low Voltage Cascode Current Mirror

xIce

Newbie
Newbie level 3
Joined
Oct 11, 2022
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
73
Hello everyone,

For the first time in my life, I am approaching Analog Design and my actual task is to to get an output impedance equal to 1MegaOhm for a Low Voltage Cascode Current Mirror;
The current is 20uA, the four MOSFETs involved in the circuit are pretty much the same when it comes to Cox, modulation channel length and other parameters.

So basically the only thing that I need to change, from what I understood, is the ratio W/L of the MOSFETs; Of course, since I want the output current to match the reference current, the ratio W/L of the two MOSFETs involved in the cascode, the upper ones basically, needs to be the same and the same goes for the W/L of the mirror MOSFETs.

I have noticed that decreasing the length of the mirror MOSFETs allows me to gain a higher output impedance, like right now the maximum value that I got is 738 kOhm by using W/L=20/0.50 for the Mirror MOSFETs and W/L=20/1 for the Cascode Mosfets;
I am not sure if I understood how the ratio W/L should change the output impedance. Could anyone explain it to me?

Kind regards and thanks to everyone who is going to answer me
 

nitishn5

Full Member level 6
Full Member level 6
Joined
Mar 27, 2011
Messages
335
Helped
84
Reputation
170
Reaction score
91
Trophy points
1,308
Location
Bangalore, India, India
Activity points
3,742
I am not sure you are looking at the right results but nonetheless.
Consider the Cascode Current mirror in the image below
1678771215545.png


W/L of Q3=Q4 and Q1=Q2. This is a must for Iout=Iin. For other ratios you can scale proportionately.

Q1/Q2 are the mirror transistors. They should be biased in Saturation with some margin. We want to ensure that they have the max Rout.
So give it the large L. Keep the W such that they are in saturation with some margin.

Q4 basically "amplifies" the Rout of Q2, since the final Rout=(gm4*rout4)*rout2
So you want Q4 to have the maximum gain. So bias it in Sub-Threshold.
Give it the minimum L and increase W so that it is in sub-threshold with some margin.

The above should give you what you want for now. (Large Rout)
There are of course other factors such as matching, headroom and area consumption, etc which can be a trade-off on what W/L you can select.
Also, Q3/Q4 does more than just "amplifying" the rout of Q2.
 

LaTeX Commands Quick-Menu:

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top