Offset-Compensated SC integrators

[ruby1212]

Hello again!
Everything was working perfectly when i was simulating the real amplifier with ideal switches (the offset cancellation scheme was working, as well as the integration),
When i replaced the ideal switches with real ones (mos switches) the amplifier did not seem to like them....Does the fact of adding switches in the feedback path of the amplifier change the closed loop transfer function of the integrator ?

 

[prestonee]

switches act as R's. also they inject charge and so a few things could happen.
an easy way to eliminate one issue from the other is use an ideal switch with an ideal resistor in series, many switch symbols have an internal resistance parameter you can set. increase this to what you think your ron value is and see if you still have the same issues. If you do then yes its your R affecting your settling time etc. If its not having issues then its due more to the injection of charge into the circuit. charge injection can be reduced by balancing switches and other techniques.

-Pb

 

[ruby1212]

Ok. Changing the values of Ron makes the circuit behave in weird ways, in different ways...
Would that mean the circuit is just dead ? i mean if no value of Ron satisfies the desired transfer function, then i will have to find a way to remove the switches from around the amplifier ? Can i prove this by equations ? anyone has an idea of how to calculate the closed loop transfer function of this circuit in the presence of switches and thus of Rons ?
Thanks for your help!

 

[prestonee]

its probably your settling. if you reduce your clocking by say x4, does it go back to normal again?
if this is the case then settling is your monster. to counter this you need to minimize your Ron, use wider shorter devices. use tgates as opposed to pass fets, etc

also calculate your rc time constant of your signal with the resistors in place, no matter how fast your amplifier, you cant make up for lost settling time, so you will never be able to settle faster then your signals rc value.

you can also solve for Beta (closed loop factor, the B in AB). when solving this you need to do it 2 times, look at Beta with all switches being 0 ohms, make sure you account for all parasitic caps. then do the same thing with Resistor included, this will show you the difference in your AB (loop gain), which you can then solve for your closed loop gain A/(1+A*B). (to save time you could sim for AB and B if you have the ability)
-Pb

 

[ruby1212]

Hi! Yes if i change the clock period i got less problems...So yes it is the values of Ron...But mostly the fact that i put around the amplifier simple nmos switches....Caus they were connected to an integrating output and their Ron changes depending on that....So i used transmission gates in the critical places of the circuit and it's kinda working normally again (well, there is loss as i approach Vdd, but i guess i just have to play with Rons to make it linear or integrating in constant steps in the whole dynamic range...).
What do you think about stability (frequency domain) of the amplifier in closed loop ? should I study that ? I mean if the amplifier is not in a stable configuration how would that reflect on the transient simulations that i am making ? I mean if things look ok in transient does it mean the amplifier is stable and no further closed loop stability inverstigations are needed ?

 

[prestonee]

no not necessarily, things could appear stable, but if you hit the output with a current spike, will the feedback cause the amplifier to oscillate? or excessively ring? these are transient hints of stability. also if you put a max signal step with a very small rise time on the amp how will the output respond?I realize you are doing a sc integ, so the signal step wont work with your current feedback network unless you put the step on the cap cm node during your integrate phase. typically any signs of ringing is indication of instability, with the large caps you have i doubt this will be a problem, however you might check your non overlap times when you have all of the caps switched out. or a reset phase if there is one.

-Pb

 

[ruby1212]

Ok. I don't seem to have this kind of problems right now, like ringing and oscillations (like you mentionned, i believe this is one benefit of my large capacitors...). Thanks a lot for your answers Prestonee.