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Nwell floating when doing ERC check

Chenxin Jiang

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Hi,

I was doing LVS check for my backend design. I use tsmc 28nm hpcp library and Innovus+Calibre flow.
It tells me that there exits floating n_well in my design and my lvs check doesn't pass.

I found that the floating n_wells belong to the endcap along the block boundary inside the block(I use bottom up flow).
After I check the layout file, I notice that these n_wells have no contact with other n_wells, comparing with other rows.

The Innovus command is shown below
set endcap_right "BOUNDARY_LEFTBWP30P140"
set endcap_left "BOUNDARY_RIGHTBWP30P140"
set endcap_top "BOUNDARY_LEFTBWP30P140 FILL2BWP30P140"
set endcap_bottom "BOUNDARY_LEFTBWP30P140 FILL2BWP30P140"
I guess my set up of adding physical cells in Innovus is wrong and I have attached the screenshots.
Could you please give me some idea?

Thanks!
1713841506483.jpg


WX20240423-110600.png


WX20240423-110724.png
WX20240423-110805.png

WX20240423-145619.png
 
Thanks Sam, I have fixed that error. I didn't insert welltap cell on the endcap row, hence they're not connected to the power net.
 

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