non-scan flip flops usage

[huckle]

Scan chains connect all state elements (flip-flops) of a design into one, or multiple shift registers chain that helps in fault-test coverage.
Can you think of some situations where a designer may allow non-scan flip flop in the design? The question pertains to Partial Scan and Non-scan designs.

Thanks,

 

[lostinxlation]

Well, you answered to your own question in the 1st sentense, didn't you ?

 

[huckle]

Well, you answered to your own question in the 1st sentense, didn't you ?

So I take that you don't think there is ever a situation when a designer can or should allow non-scan flops in the design?
If its fault coverage at question, then it must be highly risky to allow non-observable and non-controllable flops. Then why ever they allow it on the chip?

 

[lostinxlation]

You can allow non scannable flops in a certain situation even with 100% fully scannable design.
shift registers, synchronizers, etc.

 

[dftrtl]

If timing closure is difficult wehn scan path is present in clock path of FLOP then we opt out of scan