Can someone explain to me or show me a circuit where AND and NAND can be made using only with nMOS rather than with pMOS and nMOS. I think if one of those is inverted then we could get the other and NMOS inverter is easy.
The paper discusses different types of transistor loads, using both enhancement (Vt>0) and depletion mode (Vt<0) transistors. In practice, it depends on available transistor technology. I think that the circuits at page 10 ("Static AND, OR & XOR Gates") are realistic examples.