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rakesh_reddy

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Hi all.,

Can you please let me know, how i can get complete grip on Design/Verification of an SoC.
Please help me. atleast suggest me book or any link to prepare by self..!!!

Looking for your replies..!!!
 

'Design', 'Verification' & 'SOC' are subjects by itself. You need to decide what exactly you want to do.
 

Hi.,
Thank you for sparing your valuable time.
You need to understand what i mean by this sentence "Design/Verification of an SoC". Its no so easy to Design an SoC or its not so easy to Verify an SoC right. There could be some set of rules or protocols to be followed either to design or for verification of an SoC. This is what i meant here ok.

As you said these three are subjects by itself, i will be happy if you can help me by suggesting me either links/books/materials for these three subjects.

Thanks,
 

Hi,

each design is different to verify. you need to brain storm and come up with different testcases for each design. you can look into universal verification methodology in order to get started. simply the ideal checking is to check that all the possible input constellations yield the correct outputs. to do this you must create a testbench equipped with well prepared tasks and functions to control your DUT as much as necessary to check all the cases. most of the time it is really impossible to check all constellations so you would need to do brainstorm of possible test cases with each testing a certain functionality by varying the input accordingly. you need to ask yourself mainly what is required of your block to do and you need to verify that it does what it needs to do.

Cheers,
 

Design : Verilog & VHDL (books & web).
Verification : Methodologies (UVM,OVM) and system verilog
SOC : Web
 

hi., thank you aelbad..!!

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thanks sharath.!
 

Hi all.,

Can you please let me know, how i can get complete grip on Design/Verification of an SoC.
Please help me. atleast suggest me book or any link to prepare by self..!!!

Looking for your replies..!!!

DVT is easy with good specs, for without, Design is impossible.
DVT may include Statistical Analysis such as Process Capability calculations of results vs spec limits or a margin budget with margin verification worked out to meet desired yields.

So learning how to read the best SOC specs then write your own, is the best advice I can give.

the same applies to any design... IC, MCM chipstack, PoP or stacked pck's, or even a rack mounted system........

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Are you thinking of RF, CPU, ANalog/digital I/O , GPU ,Mem.?

Or a like an AMD Quark 1000 ?
 

DVT is easy with good specs, for without, Design is impossible.
DVT may include Statistical Analysis such as Process Capability calculations of results vs spec limits or a margin budget with margin verification worked out to meet desired yields.

SunnySkyguy, So learning how to read the best SOC specs then write your own, is the best advice I can give.

the same applies to any design... IC, MCM chipstack, PoP or stacked pck's, or even a rack mounted system........

- - - Updated - - -

Are you thinking of RF, CPU, ANalog/digital I/O , GPU ,Mem.?

Or a like an AMD Quark 1000 ?

can you provide any tutorial websites or more info on DVT. This actually seems like an interesting approach, that may speed up things :)

Thanks :)
 

Hi SunnySkyguy.,
Thanks for your reply.
I am sorry for late reply.

In later explorations, what i came to know is, in an soc complete control logic (system level) resides in the NorthBridge right. so, do we have any such materials or any books or do source of information related to this.?


Thanks in advance,
Rakesh
 

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