vhdl code for bcd counter
frns......
i converted the code into VHDL. but couldnt compile because of errors
the errors are
Error (10500): VHDL syntax error at BCD_16.vhd(14) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(15) near text "elsif"; expecting "end", or "(", or an identifier ("elsif" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(15) near text "then"; expecting "<="
Error (10500): VHDL syntax error at BCD_16.vhd(16) near text "="; expecting "(", or "'", or "."
Error (10500): VHDL syntax error at BCD_16.vhd(17) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(17) near text "="; expecting "(", or "'", or "."
Error (10500): VHDL syntax error at BCD_16.vhd(18) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(18) near text "="; expecting "(", or "'", or "."
Error (10500): VHDL syntax error at BCD_16.vhd(19) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(19) near text "="; expecting "(", or "'", or "."
Error (10500): VHDL syntax error at BCD_16.vhd(20) near text "else"; expecting "end", or "(", or an identifier ("else" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at BCD_16.vhd(21) near text "if"; expecting ";", or an identifier ("if" is a reserved keyword), or "architecture"
Error (10500): VHDL syntax error at BCD_16.vhd(23) near text "if"; expecting ";", or an identifier ("if" is a reserved keyword), or "architecture"
Error (10500): VHDL syntax error at BCD_16.vhd(25) near text "if"; expecting ";", or an identifier ("if" is a reserved keyword), or "architecture"
Error (10500): VHDL syntax error at BCD_16.vhd(27) near text "if"; expecting ";", or an identifier ("if" is a reserved keyword), or "architecture"
here's the code:
anybody help me in analyzing the errors.
library ieee;
use ieee.std_logic_1164.all;
entity bcd_16 is
port(
clk, reset : in std_logic;
count : out std_logic_vector (15 downto 0)
);
end bcd_16;
architecture counter of bcd_16 is
begin
if reset = '1' then count <= ( others => 0);
elsif ( clk'event and clk = '1') then
if count ( 3 downto 0) = "1001" then count(3 downto 0) <= "0000";
if count ( 7 downto 4) = "1001" then count(7 downto 4) <= "0000";
if count ( 11 downto 8 ) = "1001" then count(11 downto 8 ) <= "0000";
if count ( 15 downto 12) = "1001" then count(15 downto 12) <= "0000";
else count(15 downto 12) <= count(15 downto 12) + '1';
end if;
else count(11 downto 8 ) <= count(11 downto 8 ) + '1';
end if;
else count(11 downto 8 ) <= count(11 downto 8 ) + '1';
end if;
else count(3 downto 0 ) <= count(3 downto 0 ) + '1';
end if;
end if;
end counter;