Need Verilog code for instruction decoder of attiny 2313

[cipi11]

Instruction decoder

I need a Verilog code for the instruction decoder of attiny 2313 (load and store instructions)

can anyone help me???

 

[deepu_s_s]

Instruction decoder

Could you please more detail about wat u need.

 

[vlsi_whiz]

Re: Instruction decoder

Hi,

I think you what you want is the code for the Instruction Decoder of a CPU.. ie, the Control Block... This is'nt that easy but you can start by decoding a few simple instructions such as LOAD/STORE..

There are many types of load/store instructions...

LOADI data -> Load immediate the Acc with the data (Acc address is implicit)
LOAD A,B -> Load the Acc with the contents of Reg B
LOAD Reg, Data -> Load the specified register with immediate data.
etc...

First, you will have to come up with a flowchart of how each instruction is going to be executed...

for example... LOADI data

1. Check the opcode and determine what type of instruction it is.
2. If it is a Load immediate instruction, then get the immediate data from the
instruction.
If it is any other instruction... branch to that CASE statement and execute it.
3. Determine the address of the register.. in this case it is implicit, ie, Accumulator.
4. Write the data to the accumulator.
5. Increment PC (Program counter) to point to the next instruction.

It is important to increment PC so that it points to the next instruction in the queue.
When you write out the flowchart ... you will know how many clock cycles each instruction takes to execute.

This ID unit is one large CASE statement.. with several branches depending on the type of instruction being decoded and the actions taken.

This LOADI instruction will take 2 clocks ... one to fetch the data from the memory/instruction and the next to store it into the Acc.

 

[oursriharsha]

Re: Instruction decoder

VLSI_whiz,
if you can notice there was a query of mine regarding this instruction decoder sort of code i have a question for .
with title if-elsif alternative.

can u please go through that post once and see whether it resembles this question .

Added after 1 minutes:

cipi 11 , even u can also go through the post .and let me know clearly what you are looking for.

 

[cipi11]

Re: Instruction decoder

I need to describe in Verilog commands:
LDI – Load Immediate
LDS – Load Direct from Data Space
LD – Load Indirect from Data Space using Index X, Y, Z
STS – Store Direct to Data Space
ST – Store Indirect from Register to Data Space using X, Y, Z




If you have any example???