May 24, 2017 #1 H haneet Full Member level 3 Joined Nov 7, 2006 Messages 160 Helped 14 Reputation 28 Reaction score 1 Trophy points 1,298 Activity points 2,219 Hi, I'm trying a small piece of code and i'm not sure why my results are "x". Infact, the assigned value b in this code is also "x". Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 module test; wire a,b,c; assign b=1'b1; c=b; initial begin $display("output value c=%b b=%b",c,b); end assign #20 b=1'b0; initial begin $display("output value c=%b b=%b",c,b); end endmodule Thanks in advance Last edited by a moderator: May 25, 2017
Hi, I'm trying a small piece of code and i'm not sure why my results are "x". Infact, the assigned value b in this code is also "x". Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 module test; wire a,b,c; assign b=1'b1; c=b; initial begin $display("output value c=%b b=%b",c,b); end assign #20 b=1'b0; initial begin $display("output value c=%b b=%b",c,b); end endmodule Thanks in advance
May 25, 2017 #2 ads-ee Super Moderator Staff member Joined Sep 10, 2013 Messages 7,944 Helped 1,822 Reputation 3,654 Reaction score 1,808 Trophy points 1,393 Location USA Activity points 60,207 Yeah you can't assign it in two places at once, that is the same as shorting two wires on a board with a logic 1 and logic 0, the end result is the stronger driver wins. In simulation this results in an X for I'm unsure whether it is a 1 or 0.
Yeah you can't assign it in two places at once, that is the same as shorting two wires on a board with a logic 1 and logic 0, the end result is the stronger driver wins. In simulation this results in an X for I'm unsure whether it is a 1 or 0.