Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Far as I know, BIST is mainly used on ASIC's. What is it you wish to test for once your FPGA is loaded and running?
Or do you wish to test RAMs before letting the application run? Usually BIST is used on RAMs in ASIC's.
A BIST circuit is usually just a write/read sequence to test that the bits in the RAM all work. BIST can be aplied to logic as well, but there needs to be a way to read the results and confirm correctness. Much of logic of a device is tested in the fab through JTAG chains.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.