multi stage digital design

[ABwag]

while design a NOR3A ie a 3 input nor with A input inverted.
we have two ways build a two stage nor3A OR build a 3 stage and3BC(apply demorgans to NOR3A )

so while computing the delays i found that 3 stage design was faster.

so i got a question here is that how is it faster?
and what are the factors it depends upon if we want to make multi stage faster circuit?

also i needed help regarding how to construct such ciruits?
what is the stage ratio that must be kept so as to make it faster?

plz share documents if any...that would make understanding easier