Digital vector file in cadence

[parminder]

Hi, i want to creat new vector file and use it with my designed circuit in cadence. Does anyone knows how to approach it?

 

[ThisIsNotSam]

cadence is a company, not a tool. you have to be more specific buddy.

 

[parminder]

okay dear, i am talking about cadence virtuoso.

 

[ThisIsNotSam]

let me take another stab at trying to decipher your question then: are you trying to do mixed verilog/spice sim?

 

[parminder]

yes , i will design the schematic and then input will be given through vector file.

 

[ThisIsNotSam]

you have to learn how to code a verilog testbench. it's rather simple.
and you need to learn how to use it in the virtuoso environment. not rocket science either.

 

[parminder]

i am just a beginners that is why asking for help.