[MOVED] subthreshold CMOS noise

[ali kotb]

hello guys ,

which is better,
working in sat or sub-threshold CMOS regions for the best flicker and thermal noises, if both will have the same W, L , current ?

Regards ,

 

[FvM]

if both will have the same W, L , current

How should this be possible as subthreshold border can be expressed by specific ID/W ratio?

 

[ali kotb]

yes, I pull that line back
let me rephrase it , which will give best phase noise if both have same current and why

thank you

 

[erikl]

... which will give best phase noise if both have same current and why

Depends on which noise sources you need to consider:

Both the gate-related flicker noise voltage and the drain-related flicker noise current are minimum in subthreshold mode,
also the gate-related thermal noise voltage is minimum in subthreshold mode,
but the drain-related thermal noise current is maximum in subthreshold mode.


See e.g. David M. Binkley "Tradeoffs and Optimization in Analog CMOS Design" which gives a good overview, theoretical calculations and practical test results on the context between noise (and a lot of other parameters) and the Inversion Coefficient IC, which is a measure for the inversion mode.