[Moved]: pMOS as ESD protection device

[junsik]

Hi i'm Junsik.
I am studying about ESD protection device.

Gate-Grounded NMOS (GGNMOS) is generally used as ESD protection device.
It is connected between I/O pad and ground side.
I think another ESD protection device at the power side should be needed.

As a power side ESD protection device, 'Gate-Power-PMOS' can be used?
I can't find about any pMOS as an ESD protection device.
If not, what is the general pair of GGNMOS as a ESD protection circuit?

Thank you.!

 

[erikl]

Re: pMOS as ESD protection device

I think another ESD protection device at the power side should be needed.

As a power side ESD protection device, 'Gate-Power-PMOS' can be used?

ESD protection is necessary and effective during handling of the IC, when there is no power supply connected. So it doesn't matter if the protection works into GND or VDD - these are connected via junctions.

Actually a PMOS could be used as well as an NMOS; for the same low resistance (or effectiveness), however, a PMOS needs at least twice the area as an NMOS (for charge carriers' mobility reason).

 

[dick_freebird]

My experience is that PMOS devices do not have (or have
as good) the snapback characteristic which makes NMOS
GG clamps effective. I've tried it out. What I got was ESD
"clamps" which gate-ox-ruptured, i.e. not able to even
protect themselves let alone others.

Now, you might get somewhere with a switched-gate
clamp, but conduction density is not your friend.

I do like the GG NMOS clamp (when properly tuned for
snapback in ESD, but holding voltage deterministically
greater than abs max supply rating) for its simplicity.
Perhaps you can find a way to use it, I made many
circuits with GG NMOS both on supply and signal pins
(I prefer star protection to dual ring plus core clamp).