[moved] Converting a Verilog-A module to a PSpice netlist model

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Manolis Grifoman

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Hello! I am new to PSpice. I want to simulate a circuit in PSpice but the model I have in my disposal, is a Verilog-A file. How can I make a model in Cadence from this file? Or... Can I import this file into my PSpice netlist somehow? Thank you!
 

There is no direct way to translate verilog A to spice.
You need to use behavioral devices (E,F,G,H devices) and map the behavior from Verilog A to pspice.
 

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