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MOSFET operation

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parth22

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Hi all,
I need a small help. I would like to use an NMOS for precharge operation. My target is to control the inrush current. when I turn on the power supply, a high current is flow to the DC link capacitor around 1500uf. These capacitor are further connected to the inverter circuit So leave that part. Main part is to operate the NMOS in linear region or use it's Rds so it can limit the current upto 1A. Power supply voltage range is 21 to 40V. And the time to charge the capacitor is around 200ms. So i am stucking with to control the gate voltage so that it can limit the current to 1A and not violate the SOA of MOSFET. Although I have some design with PMOS but I would like to use NMOS due to same Rds with lower cost.
Does anyone have any idea about mosfet selection?
Thanks.
 

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Hi,

please post a schematic or at least a sketch.

NMOS: either put it in the negative (GND?) line or you need additional circuitry to drive the gate (with repect to PMOS)

Why not simply use a suitable "precharge" resistor and short circuit it after 200ms with a MOSFET?

Klaus
 

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Precharge resistor is creating lot of power consumption. So not the good choice.
For gate driving I have a charge pump circuit. So that can drive the gate.
My main intension to use the NMOS in such a way so that it can turn on only for 200ms and Id = 1A.
I don't have any schematic. That I have to design. But for this i need to know how the NMOS is working.
Do you have any idea.,,how to connect a NMOS ?
 

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Hi,
parth22 said:
Precharge resistor is creating lot of power consumption. So not the good choice.
Click to expand...
in such a linear circuit the total power dissipation is fix. If you don´t want a resistor to dissipate this power, then any other device (MOSFET) needs to dissipate the same ammount of power.
Usually a resistor is more rugged on overtemperature than a MOSFET.
...But for sure it´s your choice...

parth22 said:
For gate driving I have a charge pump circuit. So that can drive the gate.
Click to expand...
You talk about "lower cost". Are you sure the "NMOS + bootstrap circuit" is cheaper than a PMOS?
Since you work on DC = duty cycle of 100% you need a self oscillating bootstrap circuit or a DCDC converter.

How to connect NMOS.
I have no "low cost solution" for your requirements. You need a current measurement (shunt), some circuit to limit the current (OPAMP or passive) and then to bypass this all.

Please do a search for "hot swap power controller". Read some papers and find out what is suitable for you and what not.

Klaus
 

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Also, you can use a low side NFET as like a Buck converter to act as a switching circuit to regulate the current into the caps....but probz a waste of time.....just use a big resistor, and a FET in series with it, and another FET in parallel with the resistor....and pwm the resistor till the caps are charged...that way you can limit the peak inrush power as you please.....with far less hassle than a separate switching converter to charge up the caps.
--- Updated ---

Alternatively, have a low side nfet to keep the input caps disconnected, then have a separate buckboost converter to pump the caps up to a nice voltage....ie, the input voltage...then switch the buckboost off......alternately, a buck converter coudl be used...but in theory it wont be able to go to 100% duty so you wont get caps cimpletely charged up to input voltage.
 
Last edited:

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Below is the LTspice simulation of a N-MOSFET limiter with a 10V charge pump that use two capacitors (C3 acts as in integrating capacitor) to limit the charging current (red trace) to <600mA.

1647380943590.png
 
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How fast do you have to reset the circuit ? In other words any consideration to
discharge of the circuit, reset it ?


Regards, Dana.
 

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KlausST said:
Hi,
in such a linear circuit the total power dissipation is fix. If you don´t want a resistor to dissipate this power, then any other device (MOSFET) needs to dissipate the same ammount of power.
Usually a resistor is more rugged on overtemperature than a MOSFET.
...But for sure it´s your choice...

You talk about "lower cost". Are you sure the "NMOS + bootstrap circuit" is cheaper than a PMOS?
Since you work on DC = duty cycle of 100% you need a self oscillating bootstrap circuit or a DCDC converter.

How to connect NMOS.
I have no "low cost solution" for your requirements. You need a current measurement (shunt), some circuit to limit the current (OPAMP or passive) and then to bypass this all.

Please do a search for "hot swap power controller". Read some papers and find out what is suitable for you and what not.

Klaus
Click to expand...
for bootstap ,,,it's fine as it's using for other switches also so...i don't need to take extra one....yeah i am looking something current limiter. Btw okah thanks.
 

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crutschow said:
Below is the LTspice simulation of a N-MOSFET limiter with a 10V charge pump that use two capacitors (C3 acts as in integrating capacitor) to limit the charging current (red trace) to <600mA.

View attachment 174935
Click to expand...
could you explain a little bit,,on what basis have you done calculation? like R1 and C3 and C2
--- Updated ---

crutschow said:
Below is the LTspice simulation of a N-MOSFET limiter with a 10V charge pump that use two capacitors (C3 acts as in integrating capacitor) to limit the charging current (red trace) to <600mA.

View attachment 174935
Click to expand...
Also one morre thing, I think timing is not matching...cap 1500uf should be charged in 200ms , as per your calculation it's around 250ms. Is R1 responsible for this?
 
Last edited:

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parth22 said:
on what basis have you done calculation? like R1 and C3 and C2
Click to expand...
No calculation.
I just adjusted the values until they gave values I wanted in the simulation.
parth22 said:
1500uf should be charged in 200ms , as per your calculation it's around 250ms. Is R1 responsible for this?
Click to expand...
It's mainly the RC value of R1 and C2.
 

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crutschow said:
No calculation.
I just adjusted the values until they gave values I wanted in the simulation.

It's mainly the RC value of R1 and C2.
Click to expand...
Okah so R1 and C2 are responsible for timing.
Also the NMOS which you have opt,,is the special one,,,because I am doing simulation (as i don't have it in my LTspice library..)
 

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danadakk said:
How fast do you have to reset the circuit ? In other words any consideration to
discharge of the circuit, reset it ?


Regards, Dana.
Click to expand...
I don't need to discharge it. After sometime when the capacitor is charged, supply for this path will be cut down and main switches will turn on.
is it possible to control the gate by PWM pulse.....
 

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parth22 said:
I don't need to discharge it. After sometime when the capacitor is charged, supply for this path will be cut down and main switches will turn on.
is it possible to control the gate by PWM pulse.....
Click to expand...
Yes with the correct PWM 5V or 3.3V logic operating output. You have to
achieve the full turn on V so with a 40Vdc in that would have to be 40V
+ Vth (somewhere around 5-10V higher than 40V, depending on MOSFET
. used) Maybe use a optocoupler on output of micro to isolate the HV.


Regards, Dana.
 

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danadakk said:
Yes with the correct PWM 5V or 3.3V logic operating output. You have to
achieve the full turn on V so with a 40Vdc in that would have to be 40V
+ Vth (somewhere around 5-10V higher than 40V, depending on MOSFET
. used) Maybe use a optocoupler on output of micro to isolate the HV.


Regards, Dana.
Click to expand...
Okah thanks for this. I will try with PWM pulse.
 

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danadakk said:
Yes with the correct PWM 5V or 3.3V logic operating output. You have to
achieve the full turn on V so with a 40Vdc in that would have to be 40V
+ Vth (somewhere around 5-10V higher than 40V, depending on MOSFET
. used) Maybe use a optocoupler on output of micro to isolate the HV.


Regards, Dana.
Click to expand...
Can you give a rough sketch,,,
And here we have applied 10V direct supply on gate....If it's not available then is there any gate charge pump circuit or gate driver?
Also Rg = 200K is too high resistance value....is there any another design for gate? Also there is no protection from the parasitic capacitane on tje gate.
Could you give hint or sketch.
In the below image, you can see the same things with PMOS. I would like it with NMOS. Can you tell about gate circuit in case of NMOS.
1649157942426.png
 
Last edited:

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Google "mosfet high side gate driver", tons of offerings. Go to digikey,.com
and use the filters to get the desired parameters you need, eg. input and output
drive levels, C load, etcc.....

PMIC - Gate Drivers | Electronic Components Distributor DigiKey

PMIC - Gate Drivers are in stock at DigiKey. Order Now! Integrated Circuits (ICs) ship same day
www.digikey.com www.digikey.com

Regards, Dana.
 

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danadakk said:
The datasheets have a typical circuit shown. So pick one that can switch mosfet Vth + 40V,
one that takes your logic level as input,

No, I cannot test circuit. Dont have parts.

Some ap notes on topic :





Regards, Dana.
Click to expand...
I mean just on LTspice simulation. and change the PMOS to NMOS.
Thanks.
 

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