rg_ming
Newbie level 3
Hi,
I'm using Xilinx FPGA and trying to write a memory controller with verilog to save data to a pseudo-SRAM chip. The memory is working on a sync burst mode. What I need to do is to save the data come out of the ADC to the memory. The ADC works on 100MSPS, the frequency of the memory I have is 80MHz. How can I synchronise the ADC and memory to ensure correct data saving.
Thanks in advance.
I'm using Xilinx FPGA and trying to write a memory controller with verilog to save data to a pseudo-SRAM chip. The memory is working on a sync burst mode. What I need to do is to save the data come out of the ADC to the memory. The ADC works on 100MSPS, the frequency of the memory I have is 80MHz. How can I synchronise the ADC and memory to ensure correct data saving.
Thanks in advance.