memory mapped tristate slave

[kalaiyarasan]

I want get the idea of memory mapped tristate slave.

So that i can able to do VHDL code for that.

can u help with me some documents

 

[ckaa]

I am assuming you are talking about an altera FPGA. If yes then this might help -
www.altera.com/literature/manual/mnl_avalon_spec.pdf

 

[kalaiyarasan]

yes. you are right
I am struggling in creating tristate slave component.
It is not showing any error message. but not loading into the hardware properly.
so thinking to create component using VHDL code for tristate slave.