Oct 25, 2010 #1 K kalaiyarasan Member level 1 Joined Jun 30, 2010 Messages 33 Helped 2 Reputation 4 Reaction score 0 Trophy points 1,286 Location hyderabad Activity points 1,454 I want get the idea of memory mapped tristate slave. So that i can able to do VHDL code for that. can u help with me some documents
I want get the idea of memory mapped tristate slave. So that i can able to do VHDL code for that. can u help with me some documents
Oct 25, 2010 #2 C ckaa Junior Member level 3 Joined Apr 6, 2006 Messages 31 Helped 6 Reputation 12 Reaction score 0 Trophy points 1,286 Activity points 1,476 I am assuming you are talking about an altera FPGA. If yes then this might help - www.altera.com/literature/manual/mnl_avalon_spec.pdf
I am assuming you are talking about an altera FPGA. If yes then this might help - www.altera.com/literature/manual/mnl_avalon_spec.pdf
Oct 26, 2010 #3 K kalaiyarasan Member level 1 Joined Jun 30, 2010 Messages 33 Helped 2 Reputation 4 Reaction score 0 Trophy points 1,286 Location hyderabad Activity points 1,454 yes. you are right I am struggling in creating tristate slave component. It is not showing any error message. but not loading into the hardware properly. so thinking to create component using VHDL code for tristate slave.
yes. you are right I am struggling in creating tristate slave component. It is not showing any error message. but not loading into the hardware properly. so thinking to create component using VHDL code for tristate slave.