Memory Interface Generator (MIG)

[hodahussein]

dear all


i have virtex 2 pro 30 kit i ask about MIG tool support this family? and what is version of ISE contain MIG tool?

wait your reply
regards

 

[kamranravian]

you want to make a core or interface any sram memory.

 

[hodahussein]

HI kamranravian

in fact i want to interface with SRAM in order to store image
wait your reply

regards

 

[voho]

Hi

Device Family Support

* Virtex-6 HXT
* Virtex-6 LX
* Virtex-6 LXT
* Virtex-5 FXT
* Virtex-5 LX
* Virtex-5 LXT
* Virtex-5 SXT
* Virtex-5 TXT
* Virtex-4 FX
* Virtex-4 LX
* Virtex-4 SX
* Spartan-6 LX
* Spartan-6 LXT
* Spartan-3A
* Spartan-3A DSP
* Spartan-3AN
* Spartan-3E
* Spartan-3

Requirements

* ISE 12.3

look at **broken link removed**

regards

 

[hodahussein]

HI kamranravian

ok, but what about Virtex2 ? did ise support it or not?

wait your reply please
regards

 

[rberek]

Voho put in his post the device families that Xilinx's MIG page says are supported. And if you visited that page, and if you'd read some of the documentation also on that page, there is no indication that Virtex 2 is supported.

r.b.

 

[hodahussein]

hi
ok i know that , so if ineed to deal with virtex 2 what is ise version suitalbe for it and support MIG for virtex 2

wait your reply

 

[rberek]

You mention in a previous post that you want an SRAM interface. If you just want a single data rate SRAM interface, MIG won't help you as it doesn't do SDR interfaces as far as I know. Besides, designing an SDR SRAM interface is very simple.

If you really want to use MIG, then the only version I can find that works with Virtex-2 is called mig007. You can get it by going to www.xilinx.com/memory and registering as a user. You'll have to read the release notes to see which version of ISE it works with.

BTW, I found all this info by following links on the page that voho provided.

r.b.

 

[hodahussein]

hi

i want to interface SRAM in order to store image (6MB) and then applying some processing on it
so , the first step and very important is how to store an image on SRAM
is there any method to store this image without using MIG tool?


wait your reply
regards

 

[rberek]

Of course there's a method. The Memory Interface Generator just generates RTL code for the FPGA to external RAM interface. It only generates code for complex interfaces like multiple data rate DRAMs which can be tricky to write. Regular SRAM, on the other hand, has a very simple interface and any decent FPGA/ASIC designer can make short work of writing the code.

You just have to pick an SRAM that suits your needs, get its datasheet and look at the timing diagrams to guide you in writing the code. Of course, you can also look to OpenCores to see if one has already been written that will work for you.

r.b.

r.b.

 

[hodahussein]

hi

i will do that and start with simple example also if you know any docs or reference related with this issue (how to store image on sram) send it to me
also colud you tell me how can i send data from PC to fpga board such as virtex2 pro30 or virex 5 , this data represent an image and need to store it on SRAM


wait your reply
B.R

 

[rberek]

Well, if you are storing a single static image, its just data, so write it into the memory in any manner you want. How you send it to the FPGA from the PC will depend on your board. It will most likely be either RS232 or USB. Xilinx will have reference designs and/or app notes for your board which will give you guidance on how to access your board's communications features.

r.b.

 

[hodahussein]

hi

as i mention before i need to store data (image) on SRAM , in fact this ram not sram but DDR SDRAM so how can i load it with data. already i found docs about sram but i need to know more abour DDR SDRAM (i have spartan3e and virtex2pro)

wait your reply for very importance
best regards

 

[rberek]

Well, you can generate a DDR SDRAM controller in several ways

* go to Micron's website and download the datasheet for a DDR SDRAM memory of the size you require. The datasheets are very complete and have flowcharts and timing diagrams documenting all the procedures required to write, read and maintain data in the memory. You can use these to write your own DDR SDRAM controller. This would teach you the most about how the DDR SDRAM works, and would be very valuable but it would be the most work.

* go to opencores.org and get a DDR_SDRAM controller that'a already written and use that. It may have little or no documentation and it may or may not be error-free. But you'd have code quite quickly.

* Get the mig007 program that I told you about earlier in this thread and generate a DDR SDRAM interface

After you get your interface, you'll have to decide how to get the file from your computer. I do not know which board you have or intend to design, but RS-232 and USB are two common ways of sending data to and from your FPGA. You'll have to determine which methods you have available and which will fit your specification regarding transfer time, etc.

Thirdly, you will have to write RTL that takes data from the FPGA-PC interface and passes it to the DDR SDRAM controller you have instantiated. You will have to determine what, if any, processing you must do to the image data and write the necessary RTL code for that. If all you want to do is store a still image, then just write the bytes into the memory sequentially and read them sequentially. Or use whatever format you wish.

r.b.

 

[hodahussein]

hi

ok i will search in this data and if i need to explanation i will return to you, thanks

B.R