MC-AMP ACLR question quality diference between high and lowd

[foxgan]

MC-AMP ACLR question

Hi
I got a trouble during debug the MC-AMP for TD-SCDMA. I found the low side ACLR is worse than the up side about 4dB at 44dBm output power. when i reduced the power level to 34dBm， both side's ACLR is the same. I don't know where it's result from.
Plz give me some suggestions.
thanks

Added after 12 minutes:

almost forget, the AMP is Doherty AMP from NXP, two 110W PA.

 

[vfone]

Re: MC-AMP ACLR question

If the amplitude of IM components (or ACLR) are not symmetrical the amplifier has Memory Effect, and the main cause of this is a time lag between AM-AM and AM-PM response of the amplifier due to a poor bias decoupling at low frequencies causing a distortion of the envelope currents.

 

[foxgan]

MC-AMP ACLR question

Thanks
I have test the PA's VBW, and I find with different
input power level, the IMD product is changing, or the low is bigger about 10db, or the same level ,or the up is bigger about 10db,

 

[vfone]

Re: MC-AMP ACLR question

You can use a two tone test having variable spacing between tones. In this way you find exactly the frequency where the bias impedance/filtering needs improvement.

 

[foxgan]

MC-AMP ACLR question

thanks
holding a 0dbm input signal ,and find the two tone spacing is 30MHz, the IMD is degraded, there is a evidence asymmetry . Does it mean i need to decouple 30MHz spur signal? holding the 1.2MHz spacing, change the level i can find the IMD change, and find asymmetric IMD products.

 

[vfone]

Re: MC-AMP ACLR question

30MHz spacing is too much. For your system try to use spacing somewhere between 500kHz and 3MHz, to cover also the Alternate Channel.

Keep in mind that memory effect is not harmful for the amplifier from the moment the asymmetric IM products are both inside of the spec limits.