lvs problem with calibre

[aaronwlee]

Right now, I am doing the lvs of my circuit and layout and I always get error: in the schematic, the circuit has 3 pins and in the layout, I also create 3 pins and their labels but when I do the lvs, I get the error "different number of ports in layout and schematic" which means that calibre can not find the pins I create in the layout

PS I delete all the pins in the schematic and delete all the pins in layout, the lvs is correct. Yesterday, I almost spent a whole day and I still can not get through....

What should I do?


Thanks

Aaron:?::?:

 

[safwatonline]

r u sure u use the right layer for pins in layout

 

[Old Nick]

I've had this with assura a few times, and I've used the right layers for the pins.

What I tend to find is that, a ground plane (we use metal 4 for gnd, and a light sheild) or whatever is floating, i.e. not connected to the grounds of the transistors etc, is floating.
Have a look through your layout and make sure all your substrate ties and vias are there. I've lost hours to similar problems.

Best of luck.

 

[aaronwlee]

thank these two gentlemen

Aaron

 

[lylnk]

u can read the calibre rule.
Find out the layer which is used to label the pin.