low voltage NOT gate below 0.7V

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movingbait

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good day.

does anyone know anything about low voltage analog logic , of particular to me is how a not gate is made (the building block for everything).

i dont think its possible with transistors/FET's as they have a minimum of 0.7V drop so ...

If anyone could provide further hints i would appreciate.

movingbait Ü
 

if you work in low voltage deep-submicron process, the threshold voltage is no longer as high as 0.7V. If you really need to work with supply voltage at the level of 0.7 V (may be 0.13um or even 0.09um process??), the Vth should be in the range of 0.3 - 0.5 or 0.6V, thus your logic gate still can be turned on. Technology scaling almost all for digital trends, so it MUST work with digital circuits (if not int*l will not give money to fab with 0.09 um).
 

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