Low-power OTA in 0.18u CMOS with 1.V supply

[mr_chip]

I have recently seen in one publication a low-power SD ADC design with a single stage telescopic cascode OTA with gain enchancement. The spec for the OTA is:

Technology: 0.18u CMOS
Power supply: ≤1V
DC gain: 80 dB
Bandwidth with 2pF load: 8.5 MHz

However I highly doubt if it possible to realize telescopic OTA in 0.18u with 1V supply.. I expect that the Vt in 0.18u is something around 400 mV for normal transistor, they are saying about using weak inversion and I do not know the required output voltage swing, but still I can't understand how it will work. Perhaps low-Vt transistors can help, but nothing is written about it.

Does anyone has ideas about it?

 

[steer]

Well, what's exactly the problem here? As long as Vdd > Vth it looks straightforward to me.
Of course, voltage swing would be limited but still sufficient for sigma-delta.

 

[wued]

which paper ? could u give the original?