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Low offset voltage auto−zero stabilized CMOS operational amplifier

metuo_abeo

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Hello guys,

I have to design a low offset voltage auto−zero stabilized CMOS operational amplifier and I started to analyze some existing implementations. I found this one, but I don't understand what are the bias pins (in left, bias 1/2/3/4) and what is their use in the schematic. This internal schematic is the same for both opamps (main and null) in the circuit below (last picture). How can I simulate this opamp?

Do you have any ideas?

Thanks in advance!

internal.png
low_offset_opamp.png
 

sutapanaki

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Your amplifier needs to work with certain currents at DC. bias1 and bias4 are to set the currents in the current sources while bias2/3 are to bias the cascodes. I don't think anyone can tell you what the values for these are because they are very dependent on the technology, the targeted current values and the size of the transistors.
Bias1/2 are not difficult to set - just generate them with a diode connected transistors passing the current you want i.e. form a current mirror. Bias2/3 need a little playing with to set because they will also affect the region of operation not only of their respective transistors but also the Vds of the transistors connected to their sources.
 

metuo_abeo

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Why should I bias a gate of MOSFET? Theoretically, it should be 0 (regarding the current). Your point is: small bias current + large gate resistance => the necessary voltages to control the MOSFETs?
 
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sutapanaki

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Well, because MOSFET transistors are electrical devices and you need to bias them and make them work electrically. JFET (a different type of device) is the one that can produce fixed current with 0 Vgs, but not the MOSFET.
 

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