Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

low offset amplifier

Status
Not open for further replies.

shanmei

Advanced Member level 1
Advanced Member level 1
Joined
Jul 26, 2006
Messages
430
Helped
8
Reputation
16
Reaction score
8
Trophy points
1,298
Location
USA
Visit site
Activity points
4,496
any method to design a low offset CMOS amplifer?
Without the auto-zero and chopper, besides the large size of the transistors, any other way to realize low offset?

Thanks,
Shawn
 

In one paper I'm obtained simple formula which works quite well.

In general, the input pair should work in moderate inversion region to obtain high gm, while current mirror be deep in saturation to minimize current mismatch.
In addition degeneration of current sources could help if technology provides high current gain factor for fets.

Other methods is to use calibration or autozeroing methods.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top