Loop stability in low dropout regulators

[fredflinstone]

LDO stability

but make sure that you run transient sims to cross check. Give a step in line or load and see whether the output is settling or not.

 

[yuyu123]

Re: LDO stability

If the loading current of the LDO has a large range, say from 0 to 150mA, how frequency compensation can be done to ensure stability?

 

[txdydhr]

LDO stability

To give attention to the loading current range, Rc and Cc must be chosed suitably, but it always could not fit all current value , the phase margin could not good at some case

 

[anqilo]

LDO stability

i just need to study that ,thanks

 

[ralphtw]

LDO stability

AC analysis for gain and pahse margin of a LDO at output point

 

[joe_chen]

Re: LDO stability

not easy to consider the ac problem

 

[ken_cn]

LDO stability

Can anyone show me the method for how to simulate in spectre?

 

[MrDiode]

Re: LDO stability

Hi,

Check this out.
It's an application note from ON Semiconductor.

https://www.onsemi.com/pub_link/Collateral/AND8037-D.PDF

Hope it helps!

 

[tom173]

Re: LDO stability

there really a lot of value information!!

 

[endru]

Re: LDO stability

arsenal wrote:
most effective is to mirror the power pmos while not connecting the drain together.

arsenal


what is the meaning, may you explain in detail, thanks!

Maybe what he means is to use replica biasing for the output transistors, just like what these papers do:
- Embedded 5 V-to-3.3 V Voltage Regulator for Supplying Digital IC’s in 3.3 V CMOS Technology <-- this guy used NMOS, instead of PMOS
- Area-Efficient Linear Regulator With Ultra-Fast Load Regulation <-- I like his method! =D

And probably this is the latest paper from this type of LDO:
- Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC

 

[rauol]

Re: LDO stability

Hi,
Are you designing a LDO are you want to Calculate the minimum Capacitor on the output and input for the LDO to be stable?

 

[rfzheng]

LDO stability

spilt the two poles or add one internal zero for the loop , only two methods for the LDO stability.

 

[mtechvlsi]

Re: LDO stability

plz provide me LDO Circuits.