Liberty-cell and RTL-design Unit

Status
Not open for further replies.
M

ManishGoel

Newbie level 1
Joined
Jun 23, 2010
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
India
Activity points
1,288
Is it true, that logic(behaviour description other than power-info,delay) would always be present in RTL-design unit whereas liberty-cell would contain both logic(defined using "function" attribute) and timing information ?

And also is it true, that if logic-description is present in both RTL-design unit and libert-cell than it would be in same format i.e statetable(udp) , boolean-expression ?
 

If you look at the liberty files, they will have the timing and power info. The function also described like the following.

function : "A2*A1";
Click to expand...

Are you talking about the RTL code of the same cell?

Yes, The RTL code will have the logic where as .lib will have logic & timing info. This is true only for std cells. You can open the verilog file & .lib file and see whats there inside.
 

    M

    ManishGoel

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…