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Level shifter isn't inserted

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YakDamBam

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I'm working with Design Compiler and UPF to insert level shifters and isolation cells into a design
I have two power domains and want to insert level shifter between two power domains

I write UPF associated with level shifter like this

set_level_shifter HtoL_sig_to_msb \
-domain SWITCH \
-applies_to inputs \
-rule high_to_low \
-location self

During synthesizing, there are errros and there aren't level shifters in netlist confirmed by VCS

So, I wonder if it is inserted in either the synthetic flow or the physical flow.
If level shfiter is inserted in synthetic flow, why level shifter isn't inserted in my case?
 

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I'm working with Design Compiler and UPF to insert level shifters and isolation cells into a design
I have two power domains and want to insert level shifter between two power domains

I write UPF associated with level shifter like this

set_level_shifter HtoL_sig_to_msb \
-domain SWITCH \
-applies_to inputs \
-rule high_to_low \
-location self

During synthesizing, there are errros and there aren't level shifters in netlist confirmed by VCS

So, I wonder if it is inserted in either the synthetic flow or the physical flow.
If level shfiter is inserted in synthetic flow, why level shifter isn't inserted in my case?
it is easier to handle MSV during physical synthesis and ignore it during logic synthesis.
 

you have missing these options like -source ,-sink ,input_supply_set and output_supply_set
 

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