LCD Problem with Genesys Virtex 5 Eval Board

[halunke86]

Hello,

I have a problem with writing values to the LCD display of the Genesys Virtex5 evalboard which uses a ST7066U lcd driver.
I succeeded to initialize the LCD, but when I want to write a letter into the DDRAM, but when booting the FPGA, the cursor moves for some microseconds one digit to the right an then returns to the start.
I guess that I follow the giving timing specs (write data setup time is 80ns and data hold time is 300ns)
Does anyone sees an error in my code or can explain why the code doesn't work?

-- needed constants

constant H_ASCII			: std_logic_vector := "01001000";
constant tc 				: integer := 72;				-- Enable cycle time (=720ns)
constant tpw 				: integer := 48; 				-- Enable high time (=480ns)
-- ... 
-- disp_entr is the last action of the initialisation
when disp_entr => 		lcd_rs <= '0';
										lcd_rw <= '0';
										lcd_db <= DB_DISPENTR;
										if cnt < delay_37us then
											cnt <= cnt + 1;
											current_state <= disp_entr;
										elsif cnt = delay_37us then
											cnt <= cnt + 1;
											lcd_e <= '1';
											current_state <= disp_entr;
										else
											lcd_e <= '0';
											cnt <= 0;
											current_state <= word1;
										end if;	
		when word1 => 				lcd_rw <= '0';
										lcd_rs <= '1';
										lcd_db <= H_ASCII;
										if cnt < tpw then
											lcd_e <= '1';
											cnt <= cnt + 1;
											current_state <= word1;
										elsif cnt >= twdsu and cnt < tc  then
											lcd_e <= '0';
											cnt <= cnt + 1;
											current_state <= word1;
										else
											cnt <= 0;
											current_state <= idle;
										end if;
										
		when idle =>			   current_state <= idle;

Thx for your help

Benny